HW4

Exercise 4.1
Different instructions utilize different hardware blocks in the basic single-cycle
implementation. The next three problems in this exercise refer to the following
instruction:
            Instruction                           Interpretation
a. AND Rd,Rs,Rt                   Reg[Rd] = Reg[Rs] AND Reg[Rt]
b. SW Rt,Offs(Rs)                 Mem[Reg[Rs] + Offs] = Reg[Rt]



4.1.1  What are the values of control signals generated by the control in
Figure 4.2 for this instruction?



4.1.2 Which resources (blocks) perform a useful function for this
instruction?

1-     branch add data memory .

Branch add, second read port of register none

4.1.3 Which resources (blocks) produce outputs, but their outputs
are not used for this instruction? Which resources produce no outputs for this
instruction?