Posted on: Wednesday, October 9, 2013
// hgkgilh.cpp : Defines the entry point for the console application.
#include "stdafx.h"
void divide_BintoA(int A,int B,int &Q,int &R)
{
long long int divisor;
int i = 0;
long long int lremainder;
int Quotient = 0;
divisor = B;
divisor = divisor << 32;
lremainder = A;
// Loop for the Division
for(i = 0; i < 33; i++)
{
// Subtract the Divisor from Remainder
lremainder = lremainder - divisor;
if(lremainder>=0)
{
// Shift Left the Quotient and add 1 into it
Quotient = (Quotient<<1)+1;
}
else
{
// Add the Divisor to remainder and Shift Left the Quotient
lremainder = lremainder + divisor;
Quotient = (Quotient<<1);
}
// Shift Right the Divisor
divisor = divisor>>1;
}
// Place the Values of Quotient and Remainder to Return
R = lremainder;
Q = Quotient;
return;
}
int main(int argc, char* argv[])
{
int Q,R;
divide_BintoA(16,7,Q,R);
printf("\nQuotient = %d, Remainder = %d\n\n", Q, R);
return 0;
}
__________________________________________________________________________
____________________________________________________________________________
HM2:
Exercise 2.1
The following problems deal with translating from C to MIPS. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program
f = g - h
f = g + (h - 5)
==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ====
2.2.1 For the C statements above, what is the corresponding MIPS assembly code? Use a minimal number of MIPS assembly instructions
Answer:
a. sub f, g, h
b. addi f, h -5
add f, g, f
================
2.2.2 For the C statements above, how many MIPS assembly instructions are needed to perform the C statement?
Answer:
a: It needs Only One Instruction
b: It Needs Two Instructions
================
2.1.3 If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f?
Answer:
a: f = 2 - 3 = -1
b: f = 2 + (3 - 5) = 0
===============
The following problems deal with translating from MIPS to C. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.
a. addi f, f, 4
b. add f, g, h
add f, i, f
2.1.4 For the MIPS assembly instructions above, what is a corresponding C statement?
a: f = f + 4
b: f = g + h + i
=================
2.2.5 the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f?
Answer:
a: f = 1 + 4 = 5
b: f = 2 + 3 + 4 = 9
_________________________________________________________________________
_________________________________________________________________________
Exercise 2.2
The following problems deal with translating from C to MIPS. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.
a. f = g – f;
b. f = i + (h – 2)
==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ====
2.2.1 For the C statements above, what is the corresponding MIPS assembly code? Use a minimal number of MIPS assembly instructions.
Answer:
a. SUB f, g, h
b. ADDI f, h -2
ADD f, i, f
==================
2.2.2 For the C statements above, how many MIPS assembly instructions are needed to perform the C statement?
Answer:
a: It needs Only One Instruction.
b: It Needs Two Instructions.
=================
2.2.3 If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f?
Answer:
a: f = 2 - 3 = -1
b: f = 4 + (3 - 2) = 5
=================================
The following problems deal with translating from MIPS to C. For the following exercise, assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.
a. addi f, f, 4
b. add f, g, h
sub f, i, f
2.2.4 For the MIPS assembly instructions above, what is a corresponding C statement?
Answer:
a: f = f + 4
b: f = g + h + i
==============
2.2.5 If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f?
Answer:
a: f = 1 + 4 = 5
b: f = 2 + 3 + 4 = 9
__________________________________________________________________________
Exercise 2.3
The following problems explore translating from C to MIPS. Assume that the variables f and g are given and could be considered 32-bit integers as declared in a C program.
a. f = –g – f;
b. f = g + (–f – 5);
==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ====
2.3.1 For the C statements above, what is the corresponding MIPS assembly code? Use a minimal number of MIPS assembly instructions.
2.3.1
Answer:
a. NEG g, g
SUB f, g, h
b. NEG h, h
ADDI f, h -5
ADD f, g, f
==================
2.3.2 For the C statements above, how many MIPS assembly instructions are needed to perform the C statement?
Answer:
a: It needs Two Instruction of MIPS
b: It Needs Three Instructions of MIPS
==================
2.3.3 If the variables f, g, h, i, and j have values 1, 2, 3, 4, and 5, respectively, what is the end value of f?
Answer:
a: f = -2 - 3 = -5
b: f = 2 + (-3 - 5) = -6
=================================
The following problems deal with translating from MIPS to C. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.
a. addi f, f, –4
b. add i, g, h
add f, i, f
2.3..4 For the MIPS statements above, what is a corresponding C statement?
Answer:
a: f = f - 4
b: f = f + g + h
=============
2.3.5 If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f?
Answer:
a: f = 1 - 4 = -3
b: f = 1 + 2 + 3 = 6
Exercise 2.4
The following problems deal with translating from C to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and$s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively.
a. f = –g – A[4];
b. B[8] = A[i–j];
==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ==== ====
2.4.1 For the C statements above, what is the corresponding MIPS assembly code?
Answer:
a. NEG $s1, $s1
ADDI $t0, $zero, 4
SLL $t0, $t0, 2
ADD $t0, $t0, $s6
lw $t1, 0($t0)
SUB $s0, $s1, $t1
b. SUB $t0, $s3, $s4
SLL $t0, $t0, 2
ADD $t0, $t0, $s6
lw $t1, 0($t0) # A[i - j] in is $t1
ADDI $t0, $zero, 8
SLL $t0, $t0, 2
ADD $t0, $t0, $s7
SW $t1, 0($t0) # $t1 is Stored in B[8]
===============
2.4.2 For the C statements above, how many MIPS assembly instructions are needed to perform the C statement?
Answer:
a: It needs 6 Instruction of MIPS
b: It Needs 8 Instructions of MIPS
==============
2.4.3 For the C statements above, how many different registers are needed to carry out the C statement?
Answer:
a: 4 Registers
b: 7 Registers
=================================
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively.
2.4.4 For the MIPS assembly instructions above, what is the cor- responding C statement?
Answer:
a: h = j * 2
f = g + h + i
b: $t0 = f * 4
$t0 = &A[f]
$t1 = g * 4
$t1 = &B[g]
f = A[f]
$t2 = &A[f] + 4
$t0 = A[g]
$t0 = $t0 + f
B[g] = $t0
================
2.4.5 For the MIPS assembly instructions above, rewrite the assembly code to minimize the number if MIPS instructions (if possible) needed to carry out the same function.
Answer:
a: This Code Can't be minimized
b: sll $t0, $s0, 2 # $t0 = f * 4
add $t0, $s6, $t0 # $t0 = &A[f]
sll $t1, $s1, 2 # $t1 = g * 4
add $t1, $s7, $t1 # $t1 = &B[g]
lw $s0, 0($t0) # f = A[f]
lw $t0, 4($t0) #
add $t0, $t0, $s0 #
sw $t0, 0($t1) #
================
2.4.6 How many registers are needed to carry out the MIPS assembly as written above? If you could rewrite the code above, what is the minimal number of registers needed?
Answer:
a: 6 Registers
b: 7 Registers and 6 Registers When Code is Minimized
___________________________________________________________________________
Exercise 2.5
In the following problems, we will be investigating memory operations in the con- text of an MIPS processor. The table below shows the values of an array stored in memory. Assume the base address of the array is stored in register $s6 and offset it with respect to the base address of the array
2.5.1 For the memory locations in the table above, write C code to sort the data from lowest to highest, placing the lowest value in the smallest memory location shown in the figure. Assume that the data shown represents the C variable called Array, which is an array of type int, and that the first number in the array shown is the first element in the array. Assume that this particular machine is a byte-addressable machine and a word consists of four bytes.
Answer:
a. t0 = Array[0]
Array[0] = Array[4]
Array[4] = t0;
t0 = Array[1]
Array[1] = Array[3]
Array[3] = t0;
t0 = Array[3]
Array[3] = Array[4]
Array[4] = t0;
b. t0 = Array[0]
Array[0] = Array[4]
Array[4] = t0;
t0 = Array[3]
Array[3] = Array[4]
Array[4] = t0;
t0 = Array[2]
Array[2] = Array[3]
Array[3] = t0;
=====================
2.5.2 For the memory locations in the table above, write MIPS code to sort the data from lowest to highest, placing the lowest value in the smallest memory location. Use a minimum number of MIPS instructions. Assume the base address of Array is stored in register $s6
Answer:
a. lw $t0, 0($s6)
lw $t1, 16($s6)
lw $t0, 16($s6)
lw $t1, 0($s6)
lw $t0, 4($s6)
lw $t1, 12($s6)
lw $t0, 12($s6)
lw $t1, 4($s6)
lw $t0, 12($s6)
lw $t1, 16($s6)
lw $t0, 16($s6)
lw $t1, 12($s6)
b. lw $t0, 0($s6)
lw $t1, 16($s6)
lw $t0, 16($s6)
lw $t1, 0($s6)
lw $t0, 12($s6)
lw $t1, 16($s6)
lw $t0, 16($s6)
lw $t1, 12($s6)
lw $t0, 8($s6)
lw $t1, 12($s6)
lw $t0, 12($s6)
lw $t1, 8($s6)
==================
2.5.3 To sort the array above, how many instructions are required for the MIPS code? If you are not allowed to use the immediate field in lw and sw instructions, how many MIPS instructions do you need?
Answer:
a: 12 Instructions are Required to Sort the Array. 22 Instructions are required to sort the Array If immediate is not allowed
b: 12 Instructions are Required to Sort the Array. 22 Instructions are required to sort the Array If immediate is not allowed
=================================
The following problems explore the translation of hexadecimal numbers to other number formats.
Given Data
a: 0xabcdef12
b: 0x10203040
2.5.4 Translate the hexadecimal numbers above into decimal.
Answer:
a: -1412567278
b: 270544960
___________________________________________________________________________
Exercise 2.6
The following problems deal with translating from C to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words:
a. f = f + A[2];
b. B[8] = A[i] + A[j];
2.6.1 For the C statements above, what is the corresponding MIPS assembly code?
Answer:
a. LW $t0, 8($s6)
ADD $s0, $s0, $t0
b. SLL $t0, $s3, 2
ADD $t0, $t0, $s6 # $t0 = &A[i]
LW $t0, 0($t0) # $t0 = A[i]
SLL $t1, $s4, 2
ADD $t1, $t1, $s6 # $t1 = &A[j]
LW $t1, 0($t1) # $t1 = A[j]
ADD $t0, $t0, $t1 # $t0 = A[i] + A[j]
SW $t0, 32($s7)
==================
2.6.2 For the C statements above, how many MIPS assembly instructions are needed to perform the C statement?
Answer:
a: It needs 2 Instruction
b: It needs 16 Instructions
===============
2.6.3 For the C statements above, how many registers are needed to carry out the C statement using MIPS assembly code?
Answer:
a: It needs Two Registers
b: It needs Six Registers
=================================
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively.
Given MIPS Instructions
a: sub $s0, $s0, $s1
sub $s0, $s0, $s3
add $s0, $s0, $s1
b: addi $t0, $s6, 4
add $t1, $s6, $0
sw $t1, 0($t0)
lw $t0, 0($t0)
add $s0, $t1, $t0
2.6.4 For the MIPS assembly instructions above, what is the corresponding C statement?
Answer:
a: f = f - g
f = f - i
f = f + g
b: A[1] = &A[0]
f = &A[0] + A[1]
===============
2.6.5 For the MIPS assembly above, assume that the registers $s0, $s1, $s2, and $s3 contain the values 0x0000000a, 0x00000014, 0x0000001e, and 0x00000028, respectively. Also, assume that register $s6 contains the value 0x00000100, and that memory contains the following value
Address Value
0x00000100 0x00000064
0x00000104 0x000000c8
0x00000108 0x0000012c
Answer:
a: sub $s0, $s0, $s1 # $s0 = FFFFFFF6
sub $s0, $s0, $s3 # $s0 = FFFFFFCE
add $s0, $s0, $s1 # $s0 = FFFFFFE2
$s0 = FFFFFFE2
b: addi $t0, $s6, 4 # $t0 = 104
add $t1, $s6, $0 # $t1 = 100
sw $t1, 0($t0) #
lw $t0, 0($t0) # $t0 = 100
add $s0, $t1, $t0 # $s0 = 100+100
$s0 = 200
===================
2.6.6 For each MIPS instruction, show the value of the opcode (OP), source register (RS), and target register (RT) fields. For the I-type instructions, show the value of the immediate field, and for the R-type instructions, show the value of the destination register (RD) field.
Answer:
a: sub $s0, $s0, $s1 # 0000 0010 0001 0001 1000 0000 0010 0010
sub $s0, $s0, $s3 # 0000 0010 0001 0011 1000 0000 0010 0010
add $s0, $s0, $s1 # 0000 0010 0001 0001 1000 0000 0010 0000
0000 0010 0001 0001 1000 0000 0010 0010
0000 0010 0001 0011 1000 0000 0010 0010
0000 0010 0001 0001 1000 0000 0010 0000
b: addi $t0, $s6, 4 # 0010 0010 1100 1000 0000 0000 0000 0100
add $t1, $s6, $0 # 0000 0010 1100 0000 0100 1000 0010 0000
sw $t1, 0($t0) # 1010 1101 0000 1001 0000 0000 0000 0000
lw $t0, 0($t0) # 1000 1101 1110 1000 0000 0000 0000 0000
add $s0, $t1, $t0 # 0000 0001 0010 1000 1000 0000 0010 0000
0010 0010 1100 1000 0000 0000 0000 0100
0000 0010 1100 0000 0100 1000 0010 0000
1010 1101 0000 1001 0000 0000 0000 0000
1000 1101 1110 1000 0000 0000 0000 0000
0000 0001 0010 1000 1000 0000 0010 0000
____________________________________________________________________________
Exercise 2.7
The following problems explore number conversions from signed and unsigned binary numbers to decimal numbers.
a. 0010 0100 1001 0010 0100 1001 0010 0100
b. 0101 1111 1011 1110 0100 0000 0000 0000
2.7.1 For the patterns above, what base 10 number does the binary number represent, assuming that it is a two’s complement integer?
Answer:
a. 613566756
b. 1606303744
===========
2.2.7.2 For the patterns above, what base 10 number does the binary number represent, assuming that it is an unsigned integer?
Answer:
a: 613566756
b: 1606303744
===========
2.7.3 For the patterns above, what hexadecimal number does it represent?
Answer:
a: 24924924
b: 5FBE4000
=================================
The following problems explore number conversions from decimal to signed and unsigned binary numbers.
Given Instructions
a. (-1) ten
b. (1024) ten
2.7.4 For the base ten numbers above, convert to 2’s complement binary.
Answer:
a: 1111 1111 1111 1111 1111 1111 1111 1111
b: 0000 0000 0000 0000 0000 0100 0000 0000
=========
2.7.5 For the base ten numbers above, convert to 2’s complement hexadecimal.
Answer:
a: 0xFFFFFFFF
b: 0x00000400
========
2.7.6 For the base ten numbers above, convert the negated values from the table to 2’s complement hexadecimal
Answer:
a: 0x00000000
b: 0xFFFFFBFF
______________________________________________________________________________
Exercise 2.8
The following problems deal with sign extension and overflow. Registers $s0 and $s1 hold the values as shown in the table below. You will be asked to perform an MIPS assembly language instruction on these registers and show the result.
a. $s0 = 0x80000000, $s1 = 0xD0000000
b. $s0 = 0x00000001, $s1 = 0xFFFFFFFF
2.8.1 For the contents of registers $s0 and $s1 as specified above, what is the value of $t0 for the following assembly code?
add $t0, $s0, $s1
Is the result in $t0 the desired result, or has there been overflow?
Answer:
a: The Value in the $t0 is 0x00000000 and this is not the Desired Output.
There is an Overflow occurred as a Result of this Instruction.
b: The Value in the $t0 is 0x00000000 and this is the Desired Output.
There is NO Overflow occurred as a Result of this Instruction.
========
2.8.2 [5] <2.4> For the contents of registers $s0 and $s1 as specified above, what is the value of $t0 for the following assembly code?
sub $t0, $s0, $s1
Is the result in $t0 the desired result, or has there been overflow?
Answer:
a: The Value in the $t0 is 0xb0000000 and this is the Desired Output.
There is NO Overflow occurred as a Result of this Instruction.
b: The Value in the $t0 is 0x00000002 and this is the Desired Output.
There is NO Overflow occurred as a Result of this Instruction.
=========
2.8.3 For the contents of registers $s0 and $s1 as specified above, what is the value of $t0 for the following assembly code?
add $t0, $s0, $s1
add $t0, $t0, $s0
Is the result in $t0 the desired result, or has there been overflow?
Answer:
a: The Value in the $t0 is 0x00000000 and this is not the Desired Output.
There is an Overflow occurred as a Result of this Instruction.
b: The Value in the $t0 is 0x00000001 and this is the Desired Output.
There is NO Overflow occurred as a Result of this Instruction.
=================================
In the following problems, you will perform various MIPS operations on a pair of registers, $s0 and $s1. Given the values of $s0 and $s1 in each of the questions below, state if there will be overflow.
Given Instructions
a: add $s0, $s0, $s1
add $s0, $s0, $s1
b: add $s0, $s0, $s1
add $s0, $s0, $s1
add $s0, $s0, $s1
2.8.4 Assume that register $s0 = 0x70000000 and $s1 = 0x10000000. For the table above, will there be overflow?
Answer:
a: Yes, There will be an Overflow for Given Values.
b: Yes, There will be an Overflow for Given Values.
==========
2.8.5 Assume that register $s0 = 0x40000000 and $s1 = 0x20000000. For the table above, will there be overflow?
Answer:
a: Yes, There will be an Overflow for Given Values.
b: Yes, There will be an Overflow for Given Values.
============
2.8.6 Assume that register $s0 = 0x8FFFFFFF and $s1 = 0xD0000000. For the table above, will there be overflow?
Answer:
a: Yes, There will be an Overflow for Given Values.
b: Yes, There will be an Overflow for Given Values.
_________________________________________________________________________
Exercise 2.9 The table below contains various values for register $s1. You will be asked to evalu- ate if there would be overflow for a given operation.
a. $s1 = -1
b. $s1 = 1024
2.9.1 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, will there be overflow?
Answer:
a: No, There will be No Overflow for the Given Values
b: No, There will be No Overflow for the Given Values
=============
2.9.2 Assume that register $s0 = 0x80000000 and $s1 has the value as given in the table. If the instruction: sub $s0, $s0, $s1 is executed, will there be overflow?
Answer:
a: No, There will be No Overflow for the Given Values
b: Yes, There will be an Overflow for Given Values.
==============
2.9.3 Assume that register $s0 = 0x7FFFFFFF and $s1 has the value as given in the table. If the instruction: sub $s0, $s0, $s1 is executed, will there be overflow?
Answer:
a: Yes, There will be an Overflow for Given Values.
b: No, There will be No Overflow for the Given Values
=================================
The table below contains various values for register $s1. You will be asked to evaluate if there would be overflow for a given operation.
Given Instructions With Base Two
a: $s1 = 0010 0100 1001 0010 0100 1001 0010 0100 = 0x24924924
b: $s1 = 0101 1111 1011 1110 0100 0000 0000 0000 = 0x5FBE4000
2.9.4 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, will there be overflow?
Answer:
a: Yes, There will be an Overflow for Given Values.
b: Yes, There will be an Overflow for Given Values.
============
2.9.5 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, what is the result in hex?
2.9.5 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, what is the result in hex?
Answer:
a: 0x14924924
b: 0x4FBE4000
=========
2.9.6 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, what is the result in base ten?
2.9.6 Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, what is the result in base ten?
2.9.6
Answer:
a: 345131300
b: 1337868288
____________________________________________________________________________
Exercise 2.10
In the following problems, the data table contains bits that represent the opcode of an instruction. You will be asked to interpret the bits as MIPS instructions into assembly code and determine what format of MIPS instruction the bits represent.
In the following problems, the data table contains bits that represent the opcode of an instruction. You will be asked to interpret the bits as MIPS instructions into assembly code and determine what format of MIPS instruction the bits represent.
Given instructions with base two
a: 0000 0010 0001 0000 1000 0000 0010 0000
b: 0000 0001 0100 1011 0100 1000 0010 0010
2.10.1 For the binary entries above, what instruction do they represent?
Answer:
Answer:
a:
OPCODE = 000000
RS = 10000
RT = 10000
RD = 10000
SHMT = 00000
FUNCT = 100000
add $s0, $s0, $s0
b:
OPCODE = 000000
RS = 01010
RT = 01011
RD = 01001
SHMT = 00000
FUNCT = 100010
sub $t1, $t2, $t3
2.10.2
==========
2.10.2 What type (I-type, R-type, J-type) instruction do the binary entries above represent?
2.10.2 What type (I-type, R-type, J-type) instruction do the binary entries above represent?
Answer:
a: This is an R-Type Instruction.
b: This is an R-Type Instruction.
b: This is an R-Type Instruction.
===========
2.10.3 If the binary entries above were data bits, what number would they represent in hexadecimal?
2.10.3 If the binary entries above were data bits, what number would they represent in hexadecimal?
Answer:
a: 0x02108020
b: 0x014B4822
=================================
In the following problems, the data table contains MIPS instructions. You will be asked to translate the entries into the bits of the opcode and determine the MIPS instruction format.
Given Instructions
Given Instructions
a: addi $t0, $t0, 0
b: sw $t1, 32($t2)
b: sw $t1, 32($t2)
2.10.4 For the instructions above, show the binary then hexadecimal representation of these instructions.
?
Answer:
a: 0010 0001 0000 1000 0000 0000 0000 0000
0x21080000
b: 10101101010010010000000000100000
0xAD490020
===========
2.10.5 What type (I-type, R-type, J-type) instruction do the instructions above represent?
2.10.5 What type (I-type, R-type, J-type) instruction do the instructions above represent?
a: This is an I-Type Instruction
b: This is an I-Type Instruction
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2.10.6 What is the binary then hexadecimal representation of the opcode, Rs, and Rt fields in this instruction? For R-type instructions, what is the hexadecimal representation of the Rd and funct fields? For I-type instructions, what is the hexadecimal representation of the immediate field?
r:
a:
OPCODE = 001000 = 0x8
RS = 01000 = 0x8
RT = 01000 = 0x8
Immediate = 0000000000000000 = 0x0000
b: OPCODE = 101011 =
RS = 01010 = 0xA
RT = 01010 = 0x9
Immediate = 0000000000100000 = 0x0020
RS = 01000 = 0x8
RT = 01000 = 0x8
Immediate = 0000000000000000 = 0x0000
b: OPCODE = 101011 =
RS = 01010 = 0xA
RT = 01010 = 0x9
Immediate = 0000000000100000 = 0x0020
